An Ultra Low-power Low-offset Double-tail Comparator

In double tail comparators, the pre-amplifier amplifies the input differential voltage and when the output V
_cm
of the pre-amplifier becomes larger than V
_th
of the latch input transistors, the latch is activated and finalizes the comparison. As a result, the pre-amplification delay is fixed to a value and cannot be set at the minimum required delay, to save power and improve offset. In fact, when the latch is activated the pre-amplifier output differential voltage is still growing but the latch finishes the comparison before the maximum differential gain is formed and applied to the latch. In this paper, a comparator is proposed in which the preamplifier is turned off when the maximum gain is achieved so that always the maximum possible gain is applied to the latch. Therefore, not only the input referred offset is improved but also the power consumption of the pre-amplifier is saved. Simulations in 0.18μm technology show with an appropriate pre-amplification delay the average power is saved by up to 75% while the offset voltage is reduced by about 30%.